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Распайка шины AGP  [Accelerated Graphics Port]

132 pin EDGE (AGP bus) Accelerated Graphics Port (AGP) connector разъем

 

 

132 pin EDGE (AGP bus) connector at the computer motherboard

Pin

Name

Pin

Name

A1

+12 V dc

B1

spare

A2

spare

B2

+5 V dc

A3

Reserved* Ground

B3

+5 V dc

A4

USB-

B4

USB+

A5

Ground

B5

Ground

A6

INTA#

B6

INTB#

A7

RST#

B7

CLK

A8

GNT#

B8

REQ#

A9

VCC 3.3

B9

VCC 3.3

A10

ST1

B10

ST0

A11

Reserved

B11

ST2

A12

PIPE#

B12

RBF#

A13

Ground

B13

Ground

A14

Spare

B14

Spare

A15

SBA1

B15

SBA0

A16

VCC 3.3

B16

VCC 3.3

A17

SBA3

B17

SBA2

A18

Reserved

B18

SB_STB

A19

Ground

B19

Ground

A20

SBA5

B20

SBA4

A21

SBA7

B21

SBA6

A22

Key

B22

Key

A23

Key

B23

Key

A24

Key

B24

Key

A25

Key

B25

Key

A26

AD30

B26

AD31

A27

AD28

B27

AD29

A28

VCC 3.3

B28

VCC 3.3

A29

AD26

B29

AD27

A30

AD24

B30

AD25

A31

Ground

B31

Ground

A32

Reserved

B32

AD STB1

A33

C/BE3#

B33

AD23

A34

Vddq 3.3

B34

Vddq 3.3

A35

AD22

B35

AD21

A36

AD20

B36

AD19

A37

Ground

B37

Ground

A38

AD18

B38

AD17

A39

AD16

B39

C/BE2#

A40

Vddq 3.3

B40

Vddq 3.3

A41

FRAME#

B41

IRDY#

A42

Spare

B42

Spare

A43

Ground

B43

Ground

A44

Spare

B44

Spare

A45

VCC 3.3

B45

VCC 3.3

A46

TRDY#

B46

DEVSEL#

A47

STOP#

B47

Vddq 3.3

A48

Spare

B48

PERR#

A49

Ground

B49

Ground

A50

PAR

B50

SERR#

A51

AD15

B51

C/BE1#

A52

Vddq 3.3

B52

Vddq 3.3

A53

AD13

B53

AD14

A54

AD11

B54

AD12

A55

Ground

B55

Ground

A56

AD9

B56

AD10

A57

C/BE0#

B57

AD8

A58

Vddq 3.3

B58

Vddq 3.3

A59

Reserved

B59

AD STB0

A60

AD6

B60

AD7

A61

Ground

B61

Ground

A62

AD4

B62

AD5

A63

AD2

B63

AD3

A64

Vddq 3.3

B64

Vddq 3.3

A65

AD0

B65

AD1

A66

SMB1

B66

SMB0

The AGP bus is based on the PCI [Peripheral Component Interface] spec, using the PCI specification as an operational baseline. The AGP specification adds 20 additional signals not included in the PCI bus. The AGP specification defines the Protocol, Electrical and Mechanical aspects of the bus.

The Mechanical definitions include a connector and Add-in card. The Card sizes and 1.5v and 3.3v connectors are also defined with in the spec. There are five connectors defined: AGP 3.3v, AGP 1.5v, AGP Universal, AGP Pro Universal, AGP Pro 3.3v, and AGP Pro 1.5v. PCI and AGP boards are not mechanically interchangeable.

The AGP 1.0 specification defined 1x and 2x speeds with the 3.3v keyed connector.
The AGP 2.0 specification defined 1x, 2x and 4x speeds with the 3.3v, or 1.5v keyed connector or a "Universal" connector which supported both card types.
The AGP Pro specification defined 1x, 2x and 4x speeds with the 3.3v, or 1.5v keyed connector or a "Universal" connector which supported both card types.
The AGP 3.0 specification defined 1x, 2x, 4x and 8x speeds with the 1.5v keyed connector or a 1.5v AGP Pro connector.
Each up-grade is a supper-set of the 1x mode, so 4x will also support 1x. The base clock rate is 66MHz, but to achieve to 2x, 4x, and 8x speeds the clock is doubled each time. AGP uses both edges of the clock to transfer data.

AGP (1x): 66MHz clock, 8 bytes/clock, Bandwidth: 266MB/s [3.3V or 1.5V signal swing]
AGP 2x: 133MHz clock, 8 bytes/clock, Bandwidth: 533MB/s [3.3V or 1.5V signal swing]
AGP 4x: 266MHz clock, 16 bytes/clock, Bandwidth: 1066MB/s [1.5V signal swing]
AGP 8x: 533MHz clock, 32 bytes/clock, Bandwidth: 2.1GB/s [0.8V signal swing]

The AGP data bus may be 8, 16, 24, 32, or 64 bits. Due to timing requirements the maximum bus length is 9". The trace impedance is specified as 65 ohms +/- 15 ohms (no termination resistor is specified). For the 8x speed the bus

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Дата  изменения:        20.06.2016